Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a fuse layout structure of a semiconductor device.
Fuses are widely used in a semiconductor device for repairing defective memory cells. The defective memory cells included in a main cell are replaced with corresponding redundancy cells by cutting fuses of a redundancy decoder that correspond to an address of the main cell. As the degree of integration of the semiconductor device increases, the semiconductor requires a greater number of the redundancy cells and fuses for repairing the defective memory cells. Accordingly, the width of the fuses becomes narrow and the distance between each fuse decreases. Thus, the fabrication of the semiconductor device needs to be performed with more precision.
FIG. 1 is a diagram illustrating a general fuse structure for use in the semiconductor device.
The fuse F includes two wires M1 and M2 formed in different layers from each other and a contact M2C connecting the two wires M1 and M2.
FIGS. 2 and 3 are plane view figures illustrating a conventional fuse layout of the semiconductor device.
The fuse set shown in FIG. 2 includes two fuses F1 and F2. Each of the fuses F1 and F2 includes two wires formed in different layers and a contact connecting the wires. For example, the first fuse F1 is formed with a first wire M1-F1, a second wire M2-F1, and a contact M2C-F1 connecting the first and second wires M1-F1 and M2-F1. In the same way, second fuse F2 is formed with a first wire M1-F2, a second wire M2-F2, and a contact M2C-F2 connecting the first and second wires M1-F2 and M2-F2. The two fuses F1 and F2 are disposed with a predetermined space interval A. Herein, the wires of the fuses shown in FIG. 2 are formed in a straight line, and only the second wires M2-F1 and M2-F2 are formed in a fuse open area FOA cut by the laser beam.
The fuse set shown in FIG. 3 includes eight fuses F1 to F8. When eight fuses are included in the fuse set, the length of the major axis L1 of the fuse set becomes ‘7A+W.’ Herein, the ‘A’ denotes a minimum space interval between two neighboring fuses, and ‘W’ denotes a width of each fuse. Each of the fuses F1 to F8 includes two straight wires formed in different layers and a contact connecting the wires. The second wires M2-F1 to M2-F8 are formed in a fuse open area FOA cut by the laser beam.
Due to the development of the fabrication method of the semiconductor device, it is possible to reduce the width and the size of patterns arranged in the semiconductor device. However, it is relatively difficult to reduce the size of the fuse and the space interval between the fuses because a minimum margin for a fuse cutting operation is hard to decrease. Therefore, the area occupied by the fuse set in the semiconductor device relatively increases as the integration of the semiconductor device increases. Thus, to obtain high integration of the semiconductor device, it is necessary to increase the degree of the integration of fuses.